The present invention relates, in general, to electronics, and more particularly, to semiconductors, structures thereof, and methods of forming semiconductor devices.
In the past, the semiconductor industry utilized various methods and structures to form integrated filter circuits. Prior integrated filter circuits usually were not able to have a fast electrostatic discharge (ESD) response and also have a high input capacitance. According to one international specification, the International Electrotechnical Commission (IEC) specification commonly referred to as IEC 61000-4-2 (level 2) (the IEC has an address at 3, rue de Varembé, 1211 Genève 20, Switzerland), for an ESD event the peak voltage could be between two thousand and thirty thousand volts (2000-30000 V) and could occur over a period of a few nanoseconds, typically less than two nanoseconds (2 nsec.) and could last for only about one nanosecond (1 nsec.). An ESD device should respond to the ESD event within approximately 1 nanosecond.
Accordingly, it is desirable to have a method of forming an integrated filter device that has a fast ESD response and that has a high input capacitance.
For simplicity and clarity of the illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of a MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of a MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-Channel devices, or certain N-type or P-type doped regions, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. It will be appreciated by those skilled in the art that the words during, while, and when as used herein relating to circuit operation are not exact terms that mean an action takes place instantly upon an initiating action but that there may be some small but reasonable delay, such as a propagation delay, between the reaction that is initiated by the initial action. The use of the word approximately or substantially means that a value of an element has a parameter that is expected to be very close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. It is well established in the art that variances of up to at least ten percent (10%) (and up to twenty percent (20%) for semiconductor doping concentrations) are reasonable variances from the ideal goal of exactly as described. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions generally may not be straight lines and the corners may not be precise angles.